cmvr_head/board/linker_scripts/link.lds

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/* STM32H750XBHx - RT-Thread linker script (GCC/ld)
* FLASH 128K @ 0x08000000 (代码/常量/表)
* DTCMRAM 128K @ 0x20000000 (data/bss, MSP stack top)
* AXI SRAM 512K @ 0x24000000 (heap recommended)
* D2 SRAM 288K @ 0x30000000 (no use)
* D3 SRAM 64K @ 0x38000000 (no use)
* ITCMRAM 64K @ 0x00000000 (no use)
*/
ENTRY(Reset_Handler)
MEMORY
{
ITCMRAM (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 512K
RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K
RAM_D3 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K
FLASH (rx) : ORIGIN = 0x90000000, LENGTH = 8192K
}
/* MSP stack top (startup uses this) */
_estack = ORIGIN(DTCMRAM) + LENGTH(DTCMRAM);
/* Only for link-check (does NOT define RT-Thread heap) */
_Min_Stack_Size = 0x400;
_Min_Heap_Size = 0x0;
/* RT-Thread heap range in AXI SRAM (use these in board.h) */
PROVIDE(__heap_start__ = ORIGIN(RAM));
PROVIDE(__heap_end__ = ORIGIN(RAM) + LENGTH(RAM));
SECTIONS
{
/* Vector table */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector))
. = ALIGN(4);
} > FLASH
/* Code + rodata + RT-Thread tables */
.text :
{
. = ALIGN(4);
_stext = .;
*(.text)
*(.text*)
*(.glue_7)
*(.glue_7t)
*(.eh_frame)
*(.rodata)
*(.rodata*)
/* finsh shell symbol table */
. = ALIGN(4);
__fsymtab_start = .;
KEEP(*(FSymTab))
__fsymtab_end = .;
. = ALIGN(4);
__vsymtab_start = .;
KEEP(*(VSymTab))
__vsymtab_end = .;
/* rt_init section */
. = ALIGN(4);
__rt_init_start = .;
KEEP(*(SORT(.rti_fn*)))
__rt_init_end = .;
/* optional old-style ctors/dtors (some libs still emit these) */
. = ALIGN(4);
PROVIDE(__ctors_start__ = .);
KEEP(*(SORT(.ctors.*)))
KEEP(*(.ctors))
PROVIDE(__ctors_end__ = .);
. = ALIGN(4);
PROVIDE(__dtors_start__ = .);
KEEP(*(SORT(.dtors.*)))
KEEP(*(.dtors))
PROVIDE(__dtors_end__ = .);
. = ALIGN(4);
_etext = .;
} > FLASH
/* ARM exception tables */
.ARM.extab :
{
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} > FLASH
.ARM.exidx :
{
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
__exidx_end = .;
. = ALIGN(4);
} > FLASH
/* C++ init arrays */
.preinit_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN(__preinit_array_start = .);
KEEP(*(.preinit_array*))
PROVIDE_HIDDEN(__preinit_array_end = .);
. = ALIGN(4);
} > FLASH
.init_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN(__init_array_start = .);
KEEP(*(SORT(.init_array.*)))
KEEP(*(.init_array*))
PROVIDE_HIDDEN(__init_array_end = .);
. = ALIGN(4);
} > FLASH
.fini_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN(__fini_array_start = .);
KEEP(*(SORT(.fini_array.*)))
KEEP(*(.fini_array*))
PROVIDE_HIDDEN(__fini_array_end = .);
. = ALIGN(4);
} > FLASH
/* Initialized data -> DTCM, load from FLASH */
.data :
{
. = ALIGN(4);
_sdata = .;
*(.data)
*(.data*)
*(.RamFunc)
*(.RamFunc*)
. = ALIGN(4);
_edata = .;
} > DTCMRAM AT> FLASH
/* used by startup to copy .data from FLASH to DTCM */
_sidata = LOADADDR(.data);
/* BSS -> DTCM */
.bss (NOLOAD) :
{
. = ALIGN(4);
_sbss = .;
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
_ebss = .;
__bss_end__ = _ebss;
PROVIDE(__bss_end = .);
} > DTCMRAM
/* End symbols (end of DTCM used sections) */
PROVIDE(end = .);
PROVIDE(_end = .);
/* Link check: ensure DTCM has room for at least Min Stack */
._user_stack (NOLOAD) :
{
. = ALIGN(8);
. = . + _Min_Stack_Size;
. = ALIGN(8);
} > DTCMRAM
}